Silicon Photonics and Indium Phosphide: brother and sister

Silicon photonics (SiP) and Indium phosphide (InP)

Silicon Photonics (SiP) and Indium phosphide (InP) are both chip platforms that emerged over the last years supporting photonic integrated components. These photonic integrated platforms own its success by its new enabling capabilities and volume scalability.

Technical differences

Both technologies have its own advantages. Silicon based photonic chips can provide very low losses for its passive components like waveguides and support manufacturing of very small photonic circuits. They do not support an intrinsic bandgap which is required to integrate active components like lasers or amplifiers. Photodiodes can be integrated in silicon by using additional processing steps like germanium implantation, however when for example comparing the performance of the photodiodes in both technologies huge performance differences will be observed when validating responsivity and Radio Frequent (RF) performance.


Silicon photonics holds the promise to be manufactured using existing lower grade CMOS infrastructure extending the life of the existing manufacturing base. Indium phosphide does not have such install base. Laser manufacturing has been existing for several decades, but have been mainly used for low volume markets like telecommunications. These lasers were made in dimensions as small as 200 x 200 micrometers and even a single 2” wafer could hold up to 40.000 devices. Even with low yields, manufacturing of a limited number of wafers was enough to supply worldwide demand. However, the Photonic Integrated Circuits rise in other markets like data communications, LIDAR and sensing, is demanding a much higher amounts of chip space, so pushing the  volume demand. This higher demand drives Pure-Play foundries like SMART Photonics to invest in the manufacturing infrastructure supporting bigger wafer sizes and improved yields.


Silicon Photonics have a clear difference in background which can be seen back in the manufacturing cost and volume scale up. Where Silicon Photonics are very competitive in extreme high volume markets that allow for high investments ultimately reducing the cost per unit to the minimum. However volumes for new addressable markets typically do not immediately demand volumes of millions of devices. During the scale up phase it is critical that an acceptable cost level can be achieved and supported during the growth of a market. It should be taken in mind that when the demand for InP PIC’s is increasing over the years, price erosion of a factor 10 in 2 years is anticipated. Depending on the actual volumes and required chip functionality one technology will be stronger in supporting your needs. A project specific calculation need to be performed to find the optimum technology for your case.


While research groups are working hard to integrate lasers in silicon photonics, the most promising path for the near future seems to be hybrid integration. Where initial integration mainly focused on integrating lasers on top of complex silicon photonics circuits the latest trend show the integration of Silicon Photonics PIC’s with Indium Phosphide PIC circuits. With this the integration can be used to optimize for performance or integration cost. For example where initially for a multi channel wavelength transceiver multiple lasers were cleaved, coated, tested and separately align and assembled. The new scheme would involve a multi channel laser with wavelength multiplexer and referencing photodiode(s). Build-in self diagnostics can be used for testing and one only needs to align and fix a single laser output.

Would you like to find out what the platform can do for you? Please have a look at the Multi Project Wafer section. If you need any support validating your case, please feel free to reach out to our supporting team.

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